| block_sizes | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| ctype typedef | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | |
| cuda_stream_pool | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| device_data_size | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| evaluations | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | mutableprivate |
| get(const ctype k, const T &...t) const | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | inline |
| grid_sizes | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| Integrator4DGPU_fq(QuadratureProvider &quadrature_provider, const std::array< uint, 4 > grid_sizes, const ctype x_extent, const JSONValue &json) | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | inline |
| Integrator4DGPU_fq(QuadratureProvider &quadrature_provider, std::array< uint, 4 > grid_sizes, const ctype x_extent, const uint max_block_size=256) | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | inline |
| Integrator4DGPU_fq(const Integrator4DGPU_fq &other) | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | inline |
| n_devices | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| num_blocks | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| pool | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | mutableprivate |
| PoolMR typedef | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| ptr_ang_quadrature_p | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| ptr_ang_quadrature_w | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| ptr_x_quadrature_p | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| ptr_x_quadrature_w | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| quadrature_provider | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| request(const ctype k, const T &...t) const | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | inline |
| threads_per_block | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |
| x_extent | DiFfRG::Integrator4DGPU_fq< NT, KERNEL, q1, q2 > | private |